Research
Graph Neural Network for Hardware Security (Hardware Trojan Detection and IP Piracy)
Hardware Trojan Detection at Register Transfer Level using Graph Neural Networks (GNN4TJ)
- Develop a Graph Neural Network-based model to learn hardware design.
- Detect hardware Trojan in the data flow graph representation of RTL code.
IP Piracy Detection at Register Transfer Level using Graph Neural Networks (GNN4IP)
- Develop a Graph Neural Network-based model to learn circuits behavior from its data flow graph representation and generate a vectorized embedding of design.
- Evaluate the similarity between two hardware design at RTL/gate-level netlist stage by comparing the graph embedding of them to detect IP piracy.
Machine Learning for Hardware Trojan Detection through Side-Channel Analysis
Transfer Learning for Golden Chip-Free Dynamic Hardware Trojan Detection
- Design and implementation of an automated testbed to measure power and EM side-channel of various hardware Trojan benchmarks which resulted in collecting a comprehensive dataset.
- Used CNN, Transfer learning, and online learning to develop a run-time model for hardware trojan detection based on power and EM side-channel signals.
Brain-Inspired Golden-chip Free Hardware Trojan Detection
- A golden chip-free approach for hardware Trojan detection in run-time using a brain-inspired learning method, Hierarchical Temporal Memory (HTM) based on the power side-channel of circuit.
Anomaly Detection in IoT systems
Context-Aware Adaptive Anomaly Detection in IoT Systems Through Sensor Association
- Building an IoT system including 62 multi-modality sensors as an experimental setup
- Development of a context generation method and a clustering model to associated correlated sensors according to mutual information in the sensor signals
- Development of an unsupervised and adaptive anomaly detection model using the LSTM neural network and Gaussian Estimators
Multi-Tenant FPGA Security
Stealing Neural Network Structure through Remote FPGA Side-Channel Analysis
- Implementation of VGG15, AlexNet, and MLP models on FPGA as victim models and a ring oscillator-based circuit to extract power side-channel of victim models
- Used NearestNeighbors, GradientBoosting, DecisionTree, RandomForest, NeuralNetwork, Naive-Bayes, AdaBoost, and XGB classifiers to recover hyper-parameters of victim model from side-channel signals